Total Pages
Chapters
Book Overview
This book is intended to teach anyone, either someone with deep hardware development skills, or someone with little prior hardware design knowledge alike to learn how to design and verify dedicated hardware modules using HLS. HLS converts untimed or partially timed behavioral descriptions into efficient hardware descriptions in either Verilog or VHDL that can in turn be further synthesized into gate netlists through logic synthesis. The word efficient is extremely important as nobody would build a integrated circuit (IC) using HLS if the generated circuit is larger, slower and consumes more power than using traditional methods based on low-level Hardware Description Languages (HDLs).
The book will start by describing what HLS is and its main benefits. It will then cover the theory behind HLS. Basically I will answer the question of how an untimed behavioral description that was originally intended to be compiled to machine code to be executed by a Central Processing Unit (CPU) is converted into a dedicated hardware unit. The book will cover different types of optimizations to allow the designer to generated the hardware circuit within the intended constraints, and finally it will cover different input languages and how they differ. In particular ANSI-C and SystemC. I share this book with the hope that you might find it useful. Happy reading.
Chapter One
Introduction: What is High-Level Synthesis.
Chapter Two
Hardware Platforms: From ASIC to FPGA.
Chapter Three
High-Level Synthesis. Learn the principles behind HLS.
Chapter Four
Verification of HLS design. From untimed to cycle-accurate verification.
Chapter Five
High-Level Synthesis optimizations. Unroll loops, pipeline them or inline functions through synthesis directives.
Chapter Six
High-Level Synthesis Design Space Exploration. Learn how to automatically create functional equivalent hardware designs from the same behavioral description.
Chapter Seven
Input Languages. From Matlab, OpenCL to ANSI C, C++ and SystemC.
Chapter Eight
SystemC. Learn why SystemC is often preferred for HLS.
Chapter Nine
Commercial High-Level Synthesis Tools.
High-Level Synthesis Workshop
The following video gives you an oveview of what HLS is and how it works.
Book Price
This book is free for personal use. Although I have done by best effort in preparing this book I nor the publisher make no representation or warranties with respect to the accuracy, applicability, fitness or completeness of the contents of this book. The information contain in this book is strictly for educational purposes. Therefore, if you wish to apply ideas contained in this book, you are taking full responsability for your actions.
You can cite the book as follows:
@book{hlsbook,
author = {{B. Carrion Schaefer}},
year = {2023},
title = {{High-Level Synthesis Made Easy}},
publisher = {highX Technologies},
edition = {1st},
url = {https://www.hlsbook.com}
}
You can also purchase a hard copy through Amazon here.
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